1. Field of the Invention
The invention relates to the field of semiconductor devices and in particular to programmable devices having floating gates.
2. Prior Art
Metal-oxide-silicon (MOS) devices are well-known and used in the prior art. In particular, a MOS device using a floating gate has been suggested as a memory element, where the floating gate is either electrically charged or not charged and used in a similar fashion to other bistable devices such as magnetic cores, flip-flops, etc. Such MOS floating gate devices are described in U.S. Pat. No. 3,660,819, issued May 2, 1972, to Dov Frohman-Bentchkowsky, entitled "Floating Gate Transistor and Method for Charging and Discharging Same". In order to charge the floating gate to program such MOS device, it is necessary to have a source of high-energy electrons near the gate and to apply a high voltage between the drain terminal and the substrate to cause an avalanche injection of these electrons into the floating gate.
As the prior art went to denser and faster structures, n-channel MOS devices were employed rather than p-channel. These n-channel devices are described in U.S. Pat. No. 3,996,657. In addition to the reversal of the conductivity types of the various regions, these n-channel devices commonly employ two gates, the usual floating gate and an additional gate located above the floating gate, used as a control gate. This control gate is employed to charge the floating gate and for device selection. Charge is normally injected into the floating gate from the channel region rather than from the source or drain region as in the case of the previously described p-channel floating gate devices. This is sometimes referred to as channel injection as opposed to the earlier avalanche injection.
In U.S. Pat. No. 3,868,187 a p-channel avalanche injection, floating gate device is described. This device includes n-type regions adjacent to the channel for lowering the avalanche breakdown voltage, thereby providing lower-voltage programming. With the invented device and process, regions adjacent to the channel are employed to allow lower-voltage channel injection. However, unlike the prior art, these regions are formed with the "front-end" processing and are in-effect channel stops. By employing the invented process, automatic alignment of these regions with the gate is achieved. Moreover, the regions are formed without additional processing since they are formed with the channel stops.